Field of the Invention
The present invention relates to a multilayer ceramic capacitor and a structure for mounting a multilayer ceramic capacitor on a circuit board.
Description of the Related Art
In accordance with the recent trend for the miniaturization of electronic products, demand for a multilayer ceramic electronic component having a small size and high capacitance has increased.
Therefore, dielectric layers and internal electrodes have been thinned and stacked in increasing amounts through various methods. Recently, as a thickness of individual dielectric layers has been reduced, multilayer ceramic electronic components having increased amounts of stacked layers included therein have been manufactured.
Therefore, multilayer ceramic electronic components may be miniaturized, and the dielectric layers and internal electrodes may be thinned, such that the dielectric layers and internal electrodes have been stacked in increasing amounts in order to implement a high degree of capacitance.
As described above, multilayer ceramic electronic components have been miniaturized and the number of stacked layers included therein has increased, such that multilayer ceramic electronic components have thicknesses greater than widths thereof, thereby implementing a high degree of capacitance. However, a defect in which a chip topples over when the multilayer ceramic electronic component is mounted on a board may be frequently generated with the use of such multilayer ceramic electronic components.
Meanwhile, in a process of manufacturing a multilayer ceramic electronic component, ceramic bodies may collide with each other to be broken, causing a chipping defect. Thus, in order to prevent this problem, a method of polishing corners and vertexes of ceramic bodies has been used.
However, in the case of polishing corners and vertexes of ceramic bodies, the corners and vertexes of ceramic bodies may be excessively or insufficiently polished, reliability of a multilayer ceramic electronic component may be affected thereby.
Thus, research into a technology of preventing a defect in which the multilayer ceramic electronic component topples over when being mounted on a board and a chipping defect, while implementing high capacitance thereof, to thereby improve reliability of the multilayer ceramic electronic component.